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168PIN PC100 Unbuffered DIMM

512MB With 32MX8 CL2

Description

The TS64MLS64V8F2 is a 64M bit x 64 Synchronous

Dynamic RAM high-density for PC-100. The

TS64MLS64V8F2 consists of 16pcs CMOS 32Mx8 bits

Synchronous DRAMs in TSOP-II 400mil packages and a

2048 bits serial EEPROM on a 168-pin printed circuit

board. The TS64MLS64V8F2 is a Dual In-Line Memory

Module and is intended for mounting into 168-pin edge

connector sockets.

Synchronous design allows precise cycle control with

the use of system clock. I/O transactions are possible on

every clock cycle. Range of operation frequencies,

programmable latencies allow the same device to be

useful for a variety of high bandwidth, high performance

memory system applications.

Features

• Performance Range: PC-100.

• Conformed to JEDEC Standard Spec.

• Burst Mode Operation.

• Auto and Self Refresh.

• CKE Power Down Mode.

• DQM Byte Masking (Read/Write)

• Serial Presence Detect (SPD) with serial EEPROM

• LVTTL compatible inputs and outputs.

• Single 3.3V ± 0.3V power supply.

• MRS cycle with address key programs.

Latency (Access from column address)

Burst Length (1,2,4,8 & Full Page)

Data Sequence (Sequential & Interleave)

• All inputs are sampled at the positive going edge of

the system clock.

Placement

PCB:09-7308

Transcend information Inc

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Inhaltsverzeichnis

Seite 1 - 1

TTTSSS666444MMMLLLSSS666444VVV888FFF222 168PIN PC100 Unbuffered DIMM512MB With 32MX8 CL2 Description The TS64MLS64V8F2 is a 64M bit x 64 Synchronous

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TTTSSS666444MMMLLLSSS666444VVV888FFF222 168PIN PC100 Unbuffered DIMM512MB With 32MX8 CL2 SERIAL PRESENCE DETECT SPECIFICATION Serial Presence Detect

Seite 3 - Transcend information Inc

TTTSSS666444MMMLLLSSS666444VVV888FFF222 168PIN PC100 Unbuffered DIMM512MB With 32MX8 CL2 29 Minimum RAS to CAS Delay 20ns 14 30 Minimum RAS Pulse

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TTTSSS666444MMMLLLSSS666444VVV888FFF222 168PIN PC100 Unbuffered DIMM512MB With 32MX8 CL2 Dimensions Side Millimeters Inches A 133.35±0.40 5.2

Seite 5 - IL - - - uA

TTTSSS666444MMMLLLSSS666444VVV888FFF222 168PIN PC100 Unbuffered DIMM512MB With 32MX8 CL2 Pinouts: Pin No Pin Name Pin No Pin NamePin No Pin NamePin N

Seite 6 - Input signals are stable

TTTSSS666444MMMLLLSSS666444VVV888FFF222 168PIN PC100 Unbuffered DIMM512MB With 32MX8 CL2 Block Diagram SCL SDAA0 A1 A2SCL SDASerial EEPROMSA0 SA1 SA2

Seite 7

TTTSSS666444MMMLLLSSS666444VVV888FFF222 168PIN PC100 Unbuffered DIMM512MB With 32MX8 CL2 ABSOLUTE MAXIMUM RATINGS Parameter Symbol Value Unit Volt

Seite 8

TTTSSS666444MMMLLLSSS666444VVV888FFF222 168PIN PC100 Unbuffered DIMM512MB With 32MX8 CL2 CAPACITANCE (VDD = 3.3V, TA = 20°C, f = 1MHz, VREF = 1.4V ±

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TTTSSS666444MMMLLLSSS666444VVV888FFF222 168PIN PC100 Unbuffered DIMM512MB With 32MX8 CL2 AC OPERATING TEST CONDITIONS (VDD = 3.3V,0.3V, TA = 0 to 70

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TTTSSS666444MMMLLLSSS666444VVV888FFF222 168PIN PC100 Unbuffered DIMM512MB With 32MX8 CL2 AC CHARACTERISTICS (AC operating conditions unless otherwise

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TTTSSS666444MMMLLLSSS666444VVV888FFF222 168PIN PC100 Unbuffered DIMM512MB With 32MX8 CL2 SIMPLIFIED TRUTH TABLE

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