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200PIN DDR2 533 SO-DIMM

2GB With 256Mx8 CL4

Transcend Information Inc.

Description

The TS256MSQ64V5N is a 256M x 64bits DDR2-533

SO-DIMM. The TS256MSQ64V5N consists of 8pcs

256Mx8 bits DDR2 SDRAMs in 68 ball FBGA packages

and a 2048 bits serial EEPROM on a 200-pin printed

circuit board. The TS256MSQ64V5N is a Dual In-Line

Memory Module and is intended for mounting into 200-pin

edge connector sockets.

Synchronous design allows precise cycle control with the

use of system clock. Data I/O transactions are possible

on both edges of DQS. Range of operation frequencies,

programmable latencies allow the same device to be

useful for a variety of high bandwidth, high performance

memory system applications.

Features

• RoHS compliant products.

• JEDEC standard 1.8V ± 0.1V Power supply

• VDDQ=1.8V ± 0.1V

• Max clock Freq: 267MHZ; 533Mb/s/Pin.

• Posted CAS

• Programmable CAS Latency: 3,4,5

• Programmable Additive Latency :0, 1,2,3 and 4

• Write Latency (WL) = Read Latency (RL)-1

• Burst Length: 4,8(Interleave/nibble sequential)

• Programmable sequential / Interleave Burst Mode

• Bi-directional Differential Data-Strobe (Single-ended

data-strobe is an optional feature)

• Off-Chip Driver (OCD) Impedance Adjustment

• MRS cycle with address key programs.

• On Die Termination

• Serial presence detect with EEPROM

Placement

1 2 3

Inhaltsverzeichnis

Seite 1

TTTSSS222555666MMMSSSQQQ666444VVV555NNN 200PIN DDR2 533 SO-DIMM2GB With 256Mx8 CL4 Transcend Information Inc. 1Description The TS256MSQ64V5N is a 256M

Seite 2

TTTSSS222555666MMMSSSQQQ666444VVV555NNN 200PIN DDR2 533 SO-DIMM2GB With 256Mx8 CL4 Transcend Information Inc. 2Dimensions Side Millimeters Inches A

Seite 3

TTTSSS222555666MMMSSSQQQ666444VVV555NNN 200PIN DDR2 533 SO-DIMM2GB With 256Mx8 CL4 Transcend Information Inc. 3Pinouts: Pin No Pin Name Pin No Pin Na

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Transcend TS256MSQ64V5N Datenblatt

Stöbern Sie online oder laden Sie Datenblatt nach Speichermodule Transcend TS256MSQ64V5N herunter. Transcend 2GB DDR2 Memory 200Pin SO-DIMM DDR2-533 Unbuffer Non-ECC Memory Benutzerhandbuch

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